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2018 IEEE International Symposium on Electromagnetic Compatibility and 2018 IEEE Asia-Pacific Symposium on Electromagnetic Compatibility (EMC/APEMC)

DOI: 10.1109/isemc.2018.8393839

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Floorplanning for 3D-IC with Through-Silicon via co-design using simulated annealing

Proceedings article published in 2018 by Hai-Ying Zhu, Mu-Shui Zhang, Yi-Fei He, Yue-Hui Huang
This paper was not found in any repository; the policy of its publisher is unknown or unclear.
This paper was not found in any repository; the policy of its publisher is unknown or unclear.

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